wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems
Published in JCST, 2021
Recommended citation: Wanrong Gao, Jianbin Fang, Chun Huang, Chuanfu Xu, Zheng Wang. " wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems." JCST. 2021. http://jianbinfang.github.io/files/2021-09-02-jcst.pdf
This paper presents a comprehensive study to evaluate cache architecture design on three representative ARMv8 multi-cores, Phytium 2000+, ThunderX2, and Kunpeng 920 (KP920). To this end, we develop the wrBench, a micro-benchmark suite to measure the realized latency and bandwidth of caches at different memory hierarchies when performing core-to-core communications. Download paper here
Recommended citation: Wanrong Gao, Jianbin Fang, Chun Huang, Chuanfu Xu, Zheng Wang. (2021). “wrBench: Comparing Cache Architectures and Coherency Protocols on ARMv8 Many-Core Systems.” JCST. 2021.